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INTEGRATED CIRCUITS
DATA SHEET
TDA8924 2 x 120 W class-D power amplifier
Objective specification 2003 Jul 28
Philips Semiconductors
Objective specification
2 x 120 W class-D power amplifier
CONTENTS 1 2 3 4 5 6 7 8 8.1 8.2 8.3 8.3.1 8.3.2 8.3.3 8.3.4 8.4 9 10 11 12 13 14 FEATURES APPLICATIONS GENERAL DESCRIPTION QUICK REFERENCE DATA ORDERING INFORMATION BLOCK DIAGRAM PINNING FUNCTIONAL DESCRIPTION General Pulse width modulation frequency Protections Over-temperature Short-circuit across the loudspeaker terminals and to supply lines Start-up safety test Supply voltage alarm Differential audio inputs LIMITING VALUES THERMAL CHARACTERISTICS QUALITY SPECIFICATION STATIC CHARACTERISTICS SWITCHING CHARACTERISTICS DYNAMIC AC CHARACTERISTICS (STEREO AND DUAL SE APPLICATION) 15 16 16.1 16.2 16.3 16.4 16.5 16.6 16.7 16.8 16.9 16.10 16.11 16.12 17 18 18.1 18.2 18.3 18.4 18.5 19 20 21
TDA8924
DYNAMIC AC CHARACTERISTICS (MONO BTL APPLICATION) APPLICATION INFORMATION BTL application Pin MODE Output power estimation External clock Heatsink requirements Output current limiting Pumping effects Reference design PCB information for HSOP24 encapsulation Classification Reference design: bill of materials Curves measured in the reference design PACKAGE OUTLINE SOLDERING Introduction to soldering surface mount packages Reflow soldering Wave soldering Manual soldering Suitability of surface mount IC packages for wave and reflow soldering methods DATA SHEET STATUS DEFINITIONS DISCLAIMERS
2003 Jul 28
2
Philips Semiconductors
Objective specification
2 x 120 W class-D power amplifier
1 FEATURES 2 APPLICATIONS
TDA8924
* High efficiency (90 %) * Operating voltage from 12.5 V to 30 V * Very low quiescent current * Low distortion * Usable as a stereo Single-Ended (SE) amplifier or as a mono amplifier in Bridge-Tied Load (BTL) * Fixed gain of 28 dB in SE and 34 dB in BTL * High output power * Good ripple rejection * Internal switching frequency can be overruled by an external clock * No switch-on or switch-off plop noise * Short-circuit proof across the load and to the supply lines * Electrostatic discharge protection * Thermally protected. 4 QUICK REFERENCE DATA SYMBOL PARAMETER
* Television sets * Home-sound sets * Multimedia systems * All mains fed audio systems * Car audio (boosters). 3 GENERAL DESCRIPTION
The TDA8924 is a high efficiency class-D audio power amplifier with very low dissipation. The typical output power is 2 x 120 W. The device comes in a HSOP24 power package with a small internal heatsink. Depending on supply voltage and load conditions a very small or even no external heatsink is required. The amplifier operates over a wide supply voltage range from 12.5 V to 30 V and consumes a very low quiescent current.
CONDITIONS
MIN. 12.5
TYP. 24 100 83
MAX. 30 - - -
UNIT
General; VP = 24 V VP Iq(tot) Po Po supply voltage total quiescent current efficiency no load connected; note 1 Po = 240 W BTL mode V mA % - -
Stereo single-ended configuration output power RL = 2 ; THD = 10 %; VP = 24 V; note 2 - RL = 4 ; THD = 10 %; note 2 VP = 24 V VP = 20 V Notes 1. Quiescent current in application; value strongly depends on circuitry connected to the output pin. This also means that quiescent dissipation of the chip is lower than the VP x Iq. 2. Output power is measured indirectly; based on RDSon measurement. 5 ORDERING INFORMATION TYPE NUMBER TDA8924TH PACKAGE NAME HSOP24 DESCRIPTION plastic thermal enhanced small outline package; 24 leads; low stand-off height; heatsink VERSION SOT566-3 - - 240 175 - - W W 120 W
Mono bridge-tied load configuration output power
2003 Jul 28
3
Philips Semiconductors
Objective specification
2 x 120 W class-D power amplifier
6 BLOCK DIAGRAM
TDA8924
handbook, full pagewidth V DDA2
VDDA1 10
STABI PROT 18 13 RELEASE1
VDDP2 23
VDDP1 14 15
3 9 8 INPUT STAGE
BOOT1
IN1- IN1+
PWM MODULATOR
CONTROL AND ENABLE1 HANDSHAKE
SWITCH1
DRIVER HIGH 16 DRIVER LOW VSSP1 OUT1
SGND1 OSC MODE
11 7 6
mute STABI
OSCILLATOR MODE
MANAGER
TEMPERATURE SENSOR CURRENT PROTECTION
TDA8924
VDDP2 22 BOOT2
SGND2
2 mute ENABLE2 CONTROL SWITCH2 AND HANDSHAKE RELEASE2 DRIVER HIGH 21 DRIVER LOW 17 VSSP1 20 VSSP2 OUT2
IN2+ IN2-
5 4 INPUT STAGE PWM MODULATOR
1
12
24 VSSD
19 HW
MDB569
VSSA2 VSSA1
Pin 19 should be connected to pin 24 in the application.
Fig.1 Block diagram.
2003 Jul 28
4
Philips Semiconductors
Objective specification
2 x 120 W class-D power amplifier
7 PINNING SYMBOL VSSA2 SGND2 VDDA2 IN2- IN2+ MODE OSC IN1+ IN1- VDDA1 SGND1 VSSA1 PROT VDDP1 BOOT1 OUT1 VSSP1 STABI HW VSSP2 OUT2 BOOT2 VDDP2 VSSD PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 DESCRIPTION negative analog supply voltage for channel 2 signal ground channel 2 positive analog supply voltage for channel 2 negative audio input for channel 2 positive audio input for channel 2 mode select input (standby/mute/operating) oscillator frequency adjustment or tracking input positive audio input for channel 1 negative audio input for channel 1 positive analog supply voltage for channel 1 signal ground for channel 1 negative analog supply voltage for channel 1 time constant capacitor for protection delay positive power supply for channel 1 bootstrap capacitor for channel 1 PWM output from channel 1 negative power supply voltage for channel 1 decoupling internal stabilizer for logic supply handle wafer; must be connected to pin 24 negative power supply voltage for channel 2 PWM output from channel 2 bootstrap capacitor for channel 2 positive power supply voltage for channel 2 negative digital supply voltage
handbook, halfpage
TDA8924
VSSD 24 VDDP2 23 BOOT2 22 OUT2 21 VSSP2 20 HW 19
1 2 3 4 5 6
VSSA2 SGND2 VDDA2 IN2- IN2+ MODE OSC IN1+ IN1-
TDA8924TH
STABI 18 VSSP1 17 OUT1 16 BOOT1 15 VDDP1 14 PROT 13
MDB568
7 8 9
10 VDDA1 11 SGND1 12 VSSA1
Pin 19 should be connected to pin 24 in the application.
Fig.2 Pin configuration.
2003 Jul 28
5
Philips Semiconductors
Objective specification
2 x 120 W class-D power amplifier
8 8.1 FUNCTIONAL DESCRIPTION General
TDA8924
The amplifier system can be switched in three operating modes with pin MODE: * Standby mode; with a very low supply current * Mute mode; the amplifiers are operational, but the audio signal at the output is suppressed * Operating mode; the amplifiers are fully operational with output signal. An example of a switching circuit for driving pin MODE is illustrated in Fig.3. For suppressing plop noise the amplifier will remain automatically in the mute mode for approximately 150 ms before switching to the operating mode (see Fig.4). During this time, the coupling capacitors at the input are fully charged.
The TDA8924 is a two channel audio power amplifier using class-D technology. A typical application diagram is illustrated in Fig.38. A detailed application reference design is given in Section 16.8. The audio input signal is converted into a digital Pulse Width Modulated (PWM) signal via an analog input stage and PWM modulator. To enable the output power transistors to be driven, this digital PWM signal is applied to a control and handshake block and driver circuits for both the high side and low side. In this way a level shift is performed from the low power digital PWM signal (at logic levels) to a high power PWM signal which switches between the main supply lines. A 2nd-order low-pass filter converts the PWM signal to an analog audio signal across the loudspeaker. The TDA8924 one-chip class-D amplifier contains high power D-MOS switches, drivers, timing and handshaking between the power switches and some control logic. For protection a temperature sensor and a maximum current detector are built-in. Each of the two audio channels of the TDA8924 contains a PWM, an analog feedback loop and a differential input stage. The TDA8924 also contains circuits common to both channels such as the oscillator, all reference sources, the mode functionality and a digital timing manager. The TDA8924 contains two independent amplifier channels with high output power, high efficiency (90 %), low distortion and a low quiescent current. The amplifier channels can be connected in the following configurations: * Mono Bridge-Tied Load (BTL) amplifier * Stereo Single-Ended (SE) amplifiers.
handbook, halfpage
+5 V standby/ mute R MODE pin R SGND
MBL463
mute/on
Fig.3 Example of mode select circuit.
2003 Jul 28
6
Philips Semiconductors
Objective specification
2 x 120 W class-D power amplifier
TDA8924
handbook, full pagewidth
audio
switching
Vmode When switching from standby to mute, there is a delay of 100 ms before the output starts switching. The audio signal is available after Vmode has been set to operating, but not earlier than 150 ms after switching to mute. operating
4V
2V
mute
0 V (SGND)
standby 100 ms >50 ms time
audio
switching
Vmode When switching from standby to operating, there is a first delay of 100 ms before the outputs starts switching. The audio signal is available after a second delay of 50 ms. operating
4V
0 V (SGND)
standby 100 ms 50 ms time
MBL465
Fig.4 Timing on mode select input.
8.2
Pulse width modulation frequency
The output signal of the amplifier is a PWM signal with a carrier frequency of approximately 350 kHz. Using a 2nd-order LC demodulation filter in the application results in an analog audio signal across the loudspeaker. This switching frequency is fixed by an external resistor ROSC connected between pin OSC and VSSA. With the resistor value given in the schematic diagram of the reference design, the carrier frequency is typical 350 kHz. The carrier frequency can be calculated using the 9 x 10 following equation: f osc = ------------------ Hz R OSC
9
If two or more class-D amplifiers are used in the same audio application, it is advisable to have all devices operating at the same switching frequency. This can be realized by connecting all OSC pins together and feed them from an external central oscillator. Using an external oscillator it is necessary to force pin OSC to a DC-level above SGND for switching from internal to an external oscillator. In this case the internal oscillator is disabled and the PWM will be switched to the external frequency. The frequency range of the external oscillator must be in the range as specified in the switching characteristics; see Chapter 13.
2003 Jul 28
7
Philips Semiconductors
Objective specification
2 x 120 W class-D power amplifier
In an application circuit: * Internal oscillator: ROSC connected from pin OSC to VSS * External oscillator: connect oscillator signal between pin OSC and SGND; delete ROSC and COSC. 8.3 Protections 8.3.4 SUPPLY VOLTAGE ALARM
TDA8924
Remark: This test is only operational prior to or during the start-up sequence, and not during normal operation. During normal operation the maximum current protection is used to detect short-circuits across the load and with respect to the supply lines.
Temperature, supply voltage and short-circuit protection sensors are included on the chip. In the event that the maximum current or maximum temperature is exceeded the system will shut down. 8.3.1 OVER-TEMPERATURE
If the junction temperature (Tj) exceeds 150 C, then the power stage will shut down immediately. The power stage will start switching again if the temperature drops to approximately 130 C, thus there is a hysteresis of approximately 20 C. 8.3.2 SHORT-CIRCUIT ACROSS THE LOUDSPEAKER
TERMINALS AND TO SUPPLY LINES
If the supply voltage falls below 12.5 V the undervoltage protection is activated and the system shuts down correctly. If the internal clock is used, this switch-off will be silent and without plop noise. When the supply voltage rises above the threshold level the system is restarted again after 100 ms. If the supply voltage exceeds 32 V the overvoltage protection is activated and the power stages shut down. They are re-enabled as soon as the supply voltage drops below the threshold level. It has to be stressed that the overvoltage protection only protects against damage due to supply pumping effects; see Section 16.7. Apart from the power stages, the rest of the circuitry remains connected to the power supply. This means, that the supply itself should never exceed 30 V. An additional balance protection circuit compares the positive (VDD) and the negative (VSS) supply voltages and is triggered if the voltage difference between them exceeds a certain level. This level depends on the sum of both supply voltages. An expression for the unbalanced threshold level is as follows: Vth(unb) ~ 0.15 x (VDD + VSS). Example: With a symmetrical supply of 30 V the protection circuit will be triggered if the unbalance exceeds approximately 9 V; see also Section 16.7. 8.4 Differential audio inputs
When the loudspeaker terminals are short-circuited or if one of the demodulated outputs of the amplifier is short-circuited to one of the supply lines this will be detected by the current protection. If the output current exceeds the maximum output current of 12 A, then the power stage will shut down within less than 1 s and the high-current will be switched off. In this state the dissipation is very low. Every 100 ms the system tries to restart again. If there is still a short-circuit across the loudspeaker load or to one of the supply lines, the system is switched off again as soon as the maximum current is exceeded. The average dissipation will be low because of this low duty cycle. 8.3.3 START-UP SAFETY TEST
During the start-up sequence, when the mode pin is switched from standby to mute, the condition at the output terminals of the power stage are checked. In the event of a short-circuit at one of the output terminals to VDD or VSS the start-up procedure is interrupted and the systems waits for open-circuit outputs. Because the test is done before enabling the power stages, no large currents will flow in the event of a short-circuit. This system protects for short-circuits at both sides of the output filter to both supply lines. When there is a short-circuit from the power PWM output of the power stage to one of the supply lines (before the demodulation filter) it will also be detected by the start-up safety test. Practical use of this test feature can be found in detection of short-circuits on the printed-circuit board. 2003 Jul 28 8
For a high common mode rejection ratio and a maximum of flexibility in the application, the audio inputs are fully differential. By connecting the inputs anti-parallel the phase of one of the channels can be inverted, so that a load can be connected between the two output filters. In this case the system operates as a mono BTL amplifier and with the same loudspeaker impedance an approximately four times higher output power can be obtained. The input configuration for mono BTL application is illustrated in Fig.5; for more information see Chapter 16. In the stereo single-ended configuration it is also recommended to connect the two differential inputs in anti-phase. This has advantages for the current handling of the power supply at low signal frequencies.
Philips Semiconductors
Objective specification
2 x 120 W class-D power amplifier
TDA8924
handbook, full pagewidth
IN1+ IN1- Vin IN2+ IN2-
OUT1
SGND
OUT2
power stage
MBL466
Fig.5 Input configuration for mono BTL application.
2003 Jul 28
9
Philips Semiconductors
Objective specification
2 x 120 W class-D power amplifier
9 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL VP VMODE Vsc IORM Tstg Tamb Tvj Note 1. See also Section 16.6. 10 THERMAL CHARACTERISTICS SYMBOL Rth(j-a) Rth(j-c) Note 1. See also Section 16.5. 11 QUALITY SPECIFICATION In accordance with "SNW-FQ611-part D" if this type is used as an audio amplifier. PARAMETER thermal resistance from junction to ambient thermal resistance from junction to case CONDITIONS in free air; note 1 note 1 PARAMETER supply voltage input voltage on pin MODE short-circuit voltage on output pins repetitive peak current in output pin storage temperature ambient temperature virtual junction temperature note 1 with respect to SGND CONDITIONS MIN. - - - - -55 -40 -
TDA8924
MAX. 30 5.5 30 11.3 +150 +85 150
UNIT V V V A C C C
VALUE 35 1.3
UNIT K/W K/W
2003 Jul 28
10
Philips Semiconductors
Objective specification
2 x 120 W class-D power amplifier
12 STATIC CHARACTERISTICS VP = 24 V; Tamb = 25 C; measured in Fig.9; unless otherwise specified. SYMBOL Supply VP Iq(tot) Istb VMODE IMODE Vstb Vmute Von VI VOO(SE) VOO(SE) VOO(BTL) VOO(BTL) supply voltage total quiescent current standby supply current note 1 no load connected 12.5 - - note 2 VMODE = 5.5 V notes 2 and 3 notes 2 and 3 notes 2 and 3 0 - 0 2.2 4.2 - - - - - 24 100 100 - - - - - 0 - - - - PARAMETER CONDITIONS MIN. TYP.
TDA8924
MAX. 30 - 500
UNIT
V mA A V A V V V
Mode select input: pin MODE input voltage input current input voltage for standby mode input voltage for mute mode input voltage for operating mode 5.5 1000 0.8 3.0 5.5 - 150 80 215 115
Audio inputs: pins IN2-, IN2+, IN1+ and IN1- DC input voltage note 2 V
Amplifier outputs: pins OUT1 and OUT2 SE output offset voltage SE variation of output offset voltage BTL output offset voltage BTL variation of output offset voltage operating and mute operating mute operating and mute operating mute mV mV mV mV
Stabilizer: pin STABI Vo(stab) Tprot Thys Notes 1. The circuit is DC adjusted at VP = 12.5 V to 30 V. 2. With respect to SGND (0 V). 3. The transition regions between standby, mute and operating mode contain hysteresis (see Fig.6). 4. With respect to VSSP1. stabilizer output voltage operating and mute; note 4 11 13 - 20 15 - - V C C
Temperature protection temperature protection activation hysteresis on temperature protection 150 -
2003 Jul 28
11
Philips Semiconductors
Objective specification
2 x 120 W class-D power amplifier
TDA8924
handbook, full pagewidth
MBL467
STBY
MUTE
ON
0
0.8
2.2
3.0
4.2 5.5 VMODE (V)
Fig.6 Behaviour of mode selection pin MODE.
13 SWITCHING CHARACTERISTICS VDD = 24 V; Tamb = 25 C; measured in Fig.9; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Internal oscillator; note 1 fosc(typ) fosc VOSC VOSC(trip) ftrack VP(OSC)(ext) typical oscillator frequency oscillator frequency ROSC = 30.0 k 290 210 317 - 344 600 kHz kHz
External oscillator or frequency tracking voltage on pin OSC trip level for tracking at pin OSC frequency range for tracking minimum symmetrical supply voltage for external oscillator application SGND + 4.5 SGND + 5 - 210 15 SGND + 6 V V kHz V SGND + 2.5 - - - 600 -
Note 1. Frequency set with ROSC, according to the formula in Section 8.2.
2003 Jul 28
12
Philips Semiconductors
Objective specification
2 x 120 W class-D power amplifier
TDA8924
14 DYNAMIC AC CHARACTERISTICS (STEREO AND DUAL SE APPLICATION) VP = 24 V; RL = 2 ; fi = 1 kHz; fosc = 310 kHz; RsL < 0.1 (note 1); Tamb = 25 C; measured in Fig.9; unless otherwise specified. SYMBOL Po PARAMETER output power CONDITIONS RL = 4 ; VP = 27 V; THD = 0.5 %; note 2 RL = 4 ; VP = 27 V; THD = 10 %; note 2 RL = 3 ; VP = 27 V; THD = 0.5 %; note 2 RL = 3 ; VP = 27 V; THD = 10 %; note 2 RL = 2 ; VP = 24 V; THD = 0.5 %; note 2 RL = 2 ; VP = 24 V; THD = 10 %; note 2 THD total harmonic distortion Po = 1 W; note 3 fi = 1 kHz fi = 10 kHz Gv(cl) SVRR closed loop voltage gain efficiency supply voltage ripple rejection Po = 125 W; note 4 operating; fi = 100 Hz; note 5 operating; fi = 1 kHz; note 6 mute; fi = 100 Hz; note 5 standby; fi = 100 Hz; note 5 Zi Vn(o) input impedance noise output voltage operating; Rs = 0 ; note 7 operating; Rs = 10 k; note 8 mute; note 9 cs Gv Vo(mute) CMRR Notes 1. RsL = series resistance of inductor of low-pass LC filter in the application. 2. Output power is measured indirectly; based on RDSon measurement. 3. Total harmonic distortion is measured in a bandwidth of 22 Hz to 22 kHz. When distortion is measured using a lower order low-pass filter a significantly higher value is found, due to the switching frequency outside the audio band. Maximum limit is guaranteed but may not be 100 % tested. 4. Output power measured across the loudspeaker load. 5. Vripple = Vripple(max) = 2 V (p-p); fi = 100 Hz; Rs = 0 . 6. Vripple = Vripple(max) = 2 V (p-p); fi = 1 kHz; Rs = 0 . 7. B = 22 Hz to 22 kHz; Rs = 0 ; maximum limit is guaranteed but may not be 100 % tested. 8. B = 22 Hz to 22 kHz; Rs = 10 k. 9. B = 22 Hz to 22 kHz; independent of Rs. 10. Po = 1 W; Rs = 0 ; fi = 1 kHz. 11. Vi = Vi(max) = 1 V (RMS); maximum limit is guaranteed but may not be 100 % tested. 2003 Jul 28 13 channel separation channel unbalance output signal in mute common mode rejection ratio note 11 Vi(CM) = 1 V (RMS) note 10 - - - - - 40 - - 45 - - - - - - - 0.05 0.07 28 83 55 50 55 80 68 200 230 220 70 - - 75 - - - - - - - - - 400 - - - 1 400 - % % dB % dB dB dB dB k V V V dB dB V dB MIN. - - - - - - TYP. 70 90 93 115 95 120 MAX. - - - - - - UNIT W W W W W W
Philips Semiconductors
Objective specification
2 x 120 W class-D power amplifier
TDA8924
15 DYNAMIC AC CHARACTERISTICS (MONO BTL APPLICATION) VP = 24 V; RL = 4 ; fi = 1 kHz; fosc = 310 kHz; RsL < 0.1 (note 1); Tamb = 25 C; measured in Fig.9; unless otherwise specified. SYMBOL Po PARAMETER output power CONDITIONS RL = 3 ; VP = 20 V; THD = 0.5 %; note 2 RL = 3 ; VP = 20 V; THD = 10 %; note 2 RL = 4 ; VP = 20 V; THD = 0.5 %; note 2 RL = 4 ; VP = 20 V; THD = 10 %; note 2 RL = 4 ; VP = 24 V; THD = 0.5 %; note 2 RL = 4 ; VP = 24 V; THD = 10 %; note 2 THD total harmonic distortion Po = 1 W; note 3 fi = 100 Hz fi = 1 kHz fi = 10 kHz Gv(cl) SVRR closed loop voltage gain efficiency supply voltage ripple rejection Po = 240 W; note 4 operating; fi = 100 Hz; note 5 operating; fi = 1 kHz; note 6 mute; fi = 100 Hz; note 5 standby; fi = 100 Hz; note 5 Zi Vn(o) input impedance noise output voltage operating; Rs = 0 ; note 7 operating; Rs = 10 k; note 8 mute; note 9 Vo(mute) CMRR Notes 1. RsL = series resistance of inductor of low-pass LC filter in the application. 2. Output power is measured indirectly; based on RDSon measurement. 3. Total harmonic distortion is measured in a bandwidth of 22 Hz to 22 kHz. When distortion is measured using a low order low-pass filter a significant higher value will be found, due to the switching frequency outside the audio band. Maximum limit is guaranteed but may not be 100 % tested. 4. Output power measured across the loudspeaker load. 5. Vripple = Vripple(max) = 2 V (p-p); fi = 100 Hz; Rs = 0 . 6. Vripple = Vripple(max) = 2 V (p-p); fi = 1 kHz; Rs = 0 . 7. B = 22 Hz to 22 kHz; Rs = 0 ; maximum limit is guaranteed but may not be 100 % tested. 8. B = 22 Hz to 22 kHz; Rs = 10 k. 9. B = 22 Hz to 22 kHz; independent of Rs. 10. Vi = Vi(max) = 1 V (RMS); fi = 1 kHz; maximum limit is guaranteed but may not be 100 % tested. output signal in mute common mode rejection ratio note 10 Vi(CM) = 1 V (RMS) - - - - - - 36 - - 22 - - - - - 0.015 0.015 0.015 34 83 49 44 49 80 34 280 300 280 - 75 - 0.05 - - - - - - - - 560 - - 500 - % % % dB % dB dB dB dB k V V V V dB MIN. - - - - - - TYP. 160 205 135 175 200 240 MAX. - - - - - - UNIT W W W W W W
2003 Jul 28
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Philips Semiconductors
Objective specification
2 x 120 W class-D power amplifier
16 APPLICATION INFORMATION 16.1 BTL application BTL: P o(1%)
TDA8924
2 RL --------------------- x 2V P x ( 1 - t min x f osc ) R L + 1.2 = --------------------------------------------------------------------------------------------2 x RL
When using the power amplifier in a mono BTL application (for more output power), the inputs of both channels must be connected in parallel; the phase of one of the inputs must be inverted; see Fig.5. In principle the loudspeaker can be connected between the outputs of the two single-ended demodulation filters. 16.2 Pin MODE
Maximum current: 2V P x ( 1 - t min x f osc ) I o(peak) = -------------------------------------------------------- should not exceed 12 A. R L + 1.2 Legend: RL = load impedance fosc = oscillator frequency tmin = minimum pulse width (typical 190 ns) VP = single-sided supply voltage (so if supply 30 V symmetrical, then VP = 30 V) Po(1%) = output power just at clipping Po(10%) = output power at THD = 10 % Po(10%) = 1.25 x Po(1%). 16.4 External clock
For correct operation the switching voltage at pin MODE should be debounced. If pin MODE is driven by a mechanical switch an appropriate debouncing low-pass filter should be used. If pin MODE is driven by an electronic circuit or microcontroller then it should remain at the mute voltage level for at least 100 ms before switching back to the standby voltage level. 16.3 Output power estimation
The output power in several applications (SE and BTL) can be estimated using the following expressions:
2 RL --------------------- x V P x ( 1 - t min x f osc ) R L + 0.6 = ----------------------------------------------------------------------------------------2 x RL
SE: P o(1%)
The minimum required symmetrical supply voltage for external clock application is 15 V (equally, the minimum asymmetrical supply voltage for applications with an external clock is 30 V). When using an external clock the duty cycle of the external clock has to be between 47.5 % and 52.5 %. A possible solution for an external clock oscillator circuit is illustrated in Fig.7.
Maximum current: V P x ( 1 - t min x f osc ) I o(peak) = ---------------------------------------------------- should not exceed 12 A. R L + 0.6
handbook, full pagewidth
VDDA 2 k
0- 0+ 11 10 CTC 120 pF RTC 9.1 k RCTC 3 13 2 1
ASTAB- 4 5
ASTAB+ 6
-TRIGGER VDD
360 kHz 320 kHz HOP 220 nF 5.6 V
14
HEF4047BT
7 8 +TRIGGER 9 MR 12 RETRIGGER VSS
4.3 V
CLOCK
GND
MBL468
Fig.7 External oscillator circuit.
2003 Jul 28
15
Philips Semiconductors
Objective specification
2 x 120 W class-D power amplifier
16.5 Heatsink requirements
handbook, halfpage
TDA8924
Although the TDA8924 is a class-D amplifier a heatsink is required. Reason is that though efficiency is high, the output power is high as well, resulting in heating up of the device. The relation between temperatures, dissipation and thermal behaviour is given below. R th(j-a) T j(max) - T A = ---------------------------P diss
30
MBL469
Pdiss (W)
(1)
20
(2)
Pdiss is determined by the efficiency () of the TDA8924. The efficiency measured in the TDA8924 as a function of output power is given in Figs. 17 and 18. The power dissipation can be derived as function of output power; see Figs. 15 and 16. The derating curves (given for several values of the Rth(j-a)) are illustrated in Fig.8. A maximum junction temperature Tj = 150 C is taken into account. From Fig.8 the maximum allowable power dissipation for a given heatsink size can be derived or the required heatsink size can be determined at a required dissipation level. Example: Po = 2 x 100 W into 2 Tj(max) = 150 C Tamb = 60 C Pdiss(tot) = 37 W (see Fig.15). The required Rth(j-a) = 2.43 K/W can be calculated. The Rth(j-a) of the TDA8924 in free air is 35 K/W; the Rth(j-c) of the TDA8924 is 1.3 K/W, thus a heatsink of 1.13 K/W is required for this example. This example demonstrates that one might end up with unrealistically low Rth(j-a) figure. It has to be kept in mind that in actual applications, other factors such as the average power dissipation with a music source (as opposed to a continuous sine wave) will determine the size of the heatsink required. 16.6
10
(3) (4) (5)
0 0 20 40 60 100 80 Tamb (C)
(1) (2) (3) (4) (5)
Rth(j-a) = 5 K/W. Rth(j-a) = 10 K/W. Rth(j-a) = 15 K/W. Rth(j-a) = 20 K/W. Rth(j-a) = 35 K/W.
Fig.8
Derating curves for power dissipation as a function of maximum ambient temperature.
Output current limiting
To guarantee the robustness of the class-D amplifier the maximum output current which can be delivered by the output stage is limited. An overcurrent protection is included for each output power switch. When the current flowing through any of the power switches exceeds a defined internal threshold (e.g. in case of a short-circuit to the supply lines or a short-circuit across the load), the amplifier will shut down immediately and an internal timer will be started. After a fixed time (e.g. 100 ms) the amplifier is switched on again. If the requested output current is still too high the amplifier will switch-off again. Thus the amplifier will try to switch to the operating mode every 100 ms. The average dissipation will be low in this situation because of this low duty cycle. If the overcurrent condition is removed the amplifier will remain operating. Because the duty cycle is low the amplifier will be switched off for a relatively long period of time, which will be noticed as a so-called audio-hole; an audible interruption in the output signal.
2003 Jul 28
16
Philips Semiconductors
Objective specification
2 x 120 W class-D power amplifier
To trigger the maximum current protection in the TDA8924, the required output current must exceed 12 A. This situation occurs in case of: * Short-circuits from any output terminal to the supply lines (VDD or VSS) * Short-circuit across the load or speaker impedances or a load impedance below the specified values of 2 and 4 . Even if load impedances are connected to the amplifier outputs which have an impedance rating of 4 , this impedance can be lower due to the frequency characteristic of the loudspeaker; practical loudspeaker impedances can be modelled as an RLC network which will have a specific frequency characteristic: the impedance at the output of the amplifier will vary with the input frequency. A high supply voltage in combination with a low impedance will result in large current requirements. Another factor which must be taken into account is the ripple current which will also flow through the output power switches. This ripple current depends on the inductor values which are used, supply voltage, oscillator frequency, duty factor and minimum pulse width. The maximum available output current to drive the load impedance can be calculated by subtracting the ripple current from the maximum repetitive peak current in the output pin, which is 11.3 A for the TDA8924. As a rule of thumb the following expressions can be used to determine the minimum allowed load impedance without generating audio holes: V P ( 1 - t min f osc ) Z L --------------------------------------- - 0.6 for SE application. I ORM - I ripple 2V P ( 1 - t min f osc ) Z L ------------------------------------------- - 1.2 for BTL application. I ORM - I ripple Legend: ZL = load impedance fosc = oscillator frequency tmin = minimum pulse width (typical 190 ns) VP = single-sided supply voltage (if the supply = 30 V symmetrical, then VP = 30 V) IORM = maximum repetitive peak current in output pin; see also Chapter 9 Iripple = ripple current. Output current limiting goes with a signal on the protection pin (pin PROT). This pin is HIGH under normal operation. It goes LOW when current protection takes place.
TDA8924
This signal could be used by a signal processor. In order to filter the protection signal a capacitor can be connected between pin PROT and VSS. However, this capacitor slows down the protective action as well as it filters the signal. Therefore, the value of the capacitor should be limited to a maximum value of 47 pF. For a more detailed description of the implications of output current limiting see also the application notes (tbf). 16.7 Pumping effects
The TDA8924 class-D amplifier is supplied by a symmetrical voltage (e.g VDD = +24 V, VSS = -24 V). When the amplifier is used in a SE configuration, a so-called `pumping effect' can occur. During one switching interval energy is taken from one supply (e.g. VDD), while a part of that energy is delivered back to the other supply line (e.g. VSS) and visa versa. When the voltage supply source cannot sink energy the voltage across the output capacitors of that voltage supply source will increase: the supply voltage is pumped to higher levels. The voltage increase caused by the pumping effect depends on: * Speaker impedance * Supply voltage * Audio signal frequency * Capacitor value present on supply lines * Source and sink currents of other channels. The pumping effect should not cause a malfunction of either the audio amplifier and/or the voltage supply source. For instance, this malfunction can be caused by triggering of the undervoltage or overvoltage protection or unbalance protection of the amplifier. The overvoltage protection is only meant to prevent the amplifier from supply pumping effects. For a more detailed description of this phenomenon see the application notes (tbf). 16.8 Reference design
The reference design for the single-chip class-D audio amplifier using the TDA8924 is illustrated in Fig.9. The Printed-Circuit Board (PCB) layout is shown in Fig.10. The Bill Of Materials (BOM) is given in Table 1.
2003 Jul 28
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VDD GND -25 V C7 R2(3) 9.1 k 100 nF L2 BEAD L3 BEAD C4 47 F GND L4 BEAD C5 47 F VSSA VSSA VDDA C10 100 nF GND R6 C16 5.6 k 470 nF in 1 C20 330 pF R7 C17 5.6 k 470 nF SGND J3(1)
(4)
Philips Semiconductors
Every decoupling to ground (plane) must be made as close as possible to the pin. To handle 20 Hz under all conditions in stereo SE mode, the external power supply needs to have a capacitance of at least 4700 F per supply line; VP = 27 V (max).
handbook, full pagewidth
2 x 120 W class-D power amplifier
(1) (2) (3) (4)
BTL: remove IN2, R8, R9, C18, C19, C21 and close J3 and J4. BTL: connect loudspeaker between OUT1+ and OUT2-. BTL: R1 and R2 are only required when an asymmetrical supply is used (VSS = 0 V). In case of hum close J1 and J2.
GND +25 V C6 100 nF R1(3) 10 k L1 BEAD C1 470 F GND C2 470 F C3 47 F VSSP VDDP
VDDA R3 39 k on mute C8 220 nF off Z1 5.6 V
VSS
R4 39 k VDDA S1
GND
GND C9 220 nF GND R5 30 k GND OSC 7 6 MODE 14 VDDP1 17 15 BOOT1 C22 15 nF 16 OUT1 L5 10 H L6 10 H R11 4.7 C25 560 pF GND GND C37 100 nF VSSP C38 220 nF C39 100 nF GND R13 22 C29 220 nF C31 15 nF OUT2+ SGND R10 4.7 VSSP1 C24 560 pF C26 1 F C28 220 nF R12 22 C30 15 nF OUT1+
(2)
VSSA C12 100 nF
VDDP C13 100 nF
VSSP C15 100 nF GND GND GND
C11 220 nF
C14 220 nF
VDDA1 IN1+ 10 8 12
VSSA1
18
J1 GND J2
(4)
SGND OUT1- SE 2
IN1-
9
SGND1 J4(1) SGND2
11
TDA8924
2 21 IN2+ C21 330 pF 5 22 IN2- 4 1 VSSA2 GND C34 100 nF C35 220 nF C36 100 nF 3 VDDA2 GND 24 VSSD C32 220 nF 18 STABI C33 47 pF 13 19 23 VDDP2 20 VSSP2 GND PROT HW OUT2 C23 15 nF BOOT2
BTL 4
R8 C18 5.6 k 470 nF
OUT2- SE 2
C27 1 F
in 2 R9 C19 5.6 k 470 nF
MDB570
Objective specification
VSSA
VDDA
VDDP
VSSP
TDA8924
Fig.9 Single-chip class-D audio amplifier application diagram.
Philips Semiconductors
Objective specification
2 x 120 W class-D power amplifier
16.9 PCB information for HSOP24 encapsulation
TDA8924
It is possible to use several different output filter inductors such as 16RHBP or EP13 types to evaluate the performance against the price or size. 16.10 Classification The application shows optimized signal and EMI performance.
The size of the printed-circuit board is 74.3 x 59.10 mm, dual-sided 35 m copper with 121 metallized through holes. The standard configuration is a symmetrical supply (typical 24 V) with stereo SE outputs (typical 2 x 4 ). The printed-circuit board is also suitable for mono BTL configuration (1 x 8 ) also for symmetrical supply and for asymmetrical supply.
2003 Jul 28
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dbook, full pagewidth
2003 Jul 28
L6 L5 C27 C26 - Out2 + - Out1+
Philips Semiconductors
2 x 120 W class-D power amplifier
PCB version 4
C38 U1
1-2002
C35 C21 C8 C20 C11 J4
C14 C33
J3 Z1
On S1 VDD GND VSS Off
TDA8920/21/22/23/24TH state of D art
In1
In2
Top silk screen
Top copper
20
C34 C25 C1 R11 C23 C3 C22 C2 C37 C9 C36 C39 C32 C10 C15 R5 C13 C12 C24 R10 C18 R3 C19 R8 R4 C16 R9 R7 R6 C7 R2 C6 R1 C30 R12 C28 R13 C31 C17 C4 C5 L4 L2 L1 L3
Objective specification
J2
J1
PHILIPS SEMICONDUCTORS
C29
Bottom silk screen
Bottom copper
MDB567
TDA8924
Fig.10 Printed-circuit board layout for the TDA8924TH (some of the components showed on the top silk side have to be mounted on the bottom side for a proper heatsink fitting).
Philips Semiconductors
Objective specification
2 x 120 W class-D power amplifier
16.11 Reference design: bill of materials Table 1 BOM ITEM 1 2 3 4 5 6 7 8 9 10 11 12 13
TDA8924
Single-chip class-D audio amplifier printed-circuit board (version 4; 01-2002) for TDA8924TH (see Figs 9 and 10) QUANTITY 1 2 2 1 2 4 1 1 2 3 6 9 10 U1 in1 and in2 out1 and out2 VDD, GND and VSS L5 and L6 L1, L2, L3 and L4 S1 Z1 C1 and C2 C3, C4 and C5 C16, C17, C18 and C19 C8, C9, C11, C14, C28, C29, C32, C35 and C38 C6, C7, C10, C12, C13, C15, C34, C36, C37 and C39 C20 and C21 C22, C23, C30 and C31 C24, C25 C33 R3 and R4 R5 R1 R2 R6, R7, R8 and R9 R12 and R13 R10 and R11 C26 and C27 heatsink printed-circuit board material REFERENCE PART TDA8924TH cinch inputs output connector supply connector 10 H BEAD PCB switch 5V6 470 F; 35 V 47 F; 63 V 470 nF; 63 V 220 nF; 63 V 100 nF; 50 V DESCRIPTION Philips Semiconductors B.V. Farnell 152-396 Augat 5KEV-02 Augat 5KEV-03 EP13 or 16RHBP (TOKO); note 1 Murata BL01RN1-A62 Knitter ATE1E M-O-M BZX 79C5V6 DO-35 Panasonic M series ECA1VM471 Panasonic NHG series ECA1JHG470 MKT EPCOS B32529- 0474- K SMD 1206 SMD 0805
14 15 16 17 18 19 20 21 22 23 24 25 26 27 Note
2 4 2 1 2 1 1 1 4 2 2 2 1 1
330 pF; 50 V 15 nF; 50 V 560 pF; 100 V 47 pF; 25V 39 k; 0.1 W 30 k; 0.1 W 10 k; 0.1 W; optional 9.1 k; 0.1 W; optional 5.6 k; 0.1 W 22 ; 1 W 4.7 ; 0.25 W 1 F; 63V
SMD 0805 SMD 0805 SMD 0805 SMD 0805 SMD 0805 SMD 1206 SMD 0805 SMD 0805 SMD 0805 SMD 2512 SMD 1206 MKT
SK 174 50 mm (5 K/W) Fisher elektronik 1.6 mm thick epoxy FR4 material, dual-sided 35 m copper; clearances 300 m; minimum copper track 400 m
1. EP13 or 16RHBP inductors have been used in the first demo boards. In these boards, they functioned properly. However current rating basically is too low. A better choice is the new TOKO DASM 998AM-105 inductor.
2003 Jul 28
21
Philips Semiconductors
Objective specification
2 x 120 W class-D power amplifier
16.12 Curves measured in the reference design The curves illustrated in Figs 19 and 20 are measured with a restive load impedance. Spread in RL (e.g. due to the frequency characteristics of the loudspeaker) can trigger the maximum current protection circuit; see Section 16.6.
TDA8924
The curves illustrated in Figs 29 and 30 show the effects of supply pumping when only one single-ended channel is driven with a low frequency signal; see Section 16.7.
102 handbook, halfpage THD + N (%)
MDB541
102 handbook, halfpage THD + N (%)
MDB542
10
10
1
1
10-1
(1) (2)
10-1
(1) (2)
10-2
(3)
10-2
10-3 10-2
10-1
1
10
102 Po (W)
103
10-3 10
102
103
104 fi (Hz)
105
2 x 2 SE; VP = 24 V. (1) fi = 10 kHz. (2) fi = 1 kHz. (3) fi = 100 Hz.
2 x 2 SE; VP = 24 V. (1) Po = 10 W. (2) Po = 1 W.
Fig.11 THD + N as a function of output power.
Fig.12 THD + N as a function of input frequency.
2003 Jul 28
22
Philips Semiconductors
Objective specification
2 x 120 W class-D power amplifier
TDA8924
102 handbook, halfpage THD + N (%)
MDB543
102 handbook, halfpage THD + N (%)
MDB544
10
10
1
1
10-1
(1)
10-1
(1)
(2)
(2)
10-2
(3)
10-2
10-3 10-2
10-1
1
10
102 Po (W)
103
10-3 10
102
103
104 fi (Hz)
105
1 x 4 BTL; VP = 24 V. (1) fi = 10 kHz. (2) fi = 1 kHz. (3) fi = 100 Hz.
1 x 4 BTL; VP = 24 V. (1) Po = 10 W. (2) Po = 1 W.
Fig.13 THD + N as a function of output power.
Fig.14 THD + N as a function of input frequency.
handbook, halfpage
50
MDB546
handbook, halfpage
(1) (2)
60
MDB548
Pdiss (W) 40
Pdiss (W) 40
(1) (2)
(3)
30
(4)
(3)
20
20
10
0 10-2
10-1
1
10
102 103 Po (W)
0 10-2
10-1
1
10
102 103 Po (W)
1 x 2 SE; dissipation per channel. (1) (2) VP = 25 V. VP = 24 V. (3) (4) VP = 22 V. VP = 20 V.
1 x 4 BTL. (1) VP = 25 V. (2) VP = 24 V. (3) VP = 20 V.
Fig.15 Total power dissipation as function of output power.
Fig.16 Total power dissipation as function of output power.
2003 Jul 28
23
Philips Semiconductors
Objective specification
2 x 120 W class-D power amplifier
TDA8924
handbook, halfpage
100
MDB547
(%) 80
(1) (2) (3) (4)
handbook, halfpage
100
MDB549
(%) 80
(1) (2) (3)
60
60
40
40
20
20
0 0 50 100 Po (W) 150
0 0 100 200 Po (W) 300
2 x 2 SE; 10 H; 1 F. (1) (2) VP = 20 V. VP = 22 V. (3) (4) VP = 24 V. VP = 25 V.
1 x 4 BTL; 2 x 10 H; 2 x 1 F. (1) VP = 20 V. (2) (3) VP = 24 V. VP = 25 V.
Fig.17 Efficiency as a function of output power.
Fig.18 Efficiency as a function of output power.
handbook, halfpage
300
MDB553
Po
handbook, halfpage
(1)
250
MDB552
(W) 250
Po (W) 200
(1)
200 150 150
(2)
100
100
(2)
50
50
0 0 10 20 30 VDD (V)
0 0 10 20 VDD (V) 30
THD + N = 10 %; fi = 1 kHz. (1) 1 x 4 BTL. (2) 2 x 2 SE.
THD + N = 0.5 %; fi = 1 kHz. (1) 1 x 4 BTL. (2) 2 x 2 SE.
Fig.19 Output power as a function of supply voltage.
Fig.20 Output power as a function of supply voltage.
2003 Jul 28
24
Philips Semiconductors
Objective specification
2 x 120 W class-D power amplifier
TDA8924
handbook, halfpage
cs
0
MDB545
handbook, halfpage
45
MDB556
(dB) -20
Gv (dB) 40
-40
(1) (2)
35
(1)
-60
30
(2)
-80
25
(3)
-100 10
20 102 103 104 fi (Hz) 105 10 102 103 104 fi (Hz) 105
2 x 2 SE; VP = 24 V. (1) Po = 10 W. (2) Po = 1 W.
Vi = 100 mV; Rs = 5.6 k Ci = 330pF. (1) 1 x 8 BTL; Vp = 15 V. (2) 2 x 8 SE; Vp = 20 V. (3) 2 x 4 SE; Vp = 15 V.
Fig.21 Channel separation as a function of input frequency.
Fig.22 Gain as a function of input frequency.
handbook, halfpage
100
MDB549
handbook, halfpage
(1) (2) (3)
45
MDB557
(%) 80
Gv (dB) 40
(1)
60
35
(2)
40
30
(3)
20
25
0 0 100 200 Po (W) 300
20 10 102 103 104 fi (Hz) 105
1 x 4 BTL; 2 x 10 H; 2 x 1 F. (1) VP = 20 V. (2) VP = 24 V. (3) VP = 25 V.
Vi = 100 mV; Rs = 0. (1) 1 x 8 BTL; Vp = 15 V. (2) 2 x 8 SE; Vp = 20 V. (3) 2 x 4 SE; Vp = 15 V.
Fig.23 Efficiency as a function of output power.
Fig.24 Gain as a function of input frequency.
2003 Jul 28
25
Philips Semiconductors
Objective specification
2 x 120 W class-D power amplifier
TDA8924
handbook, halfpage
120 Iq
MDB554
handbook, halfpage
330
MDB555
(mA) 100
fclk (kHz) 320
80
60
310
40 300 20
0 0 10 20 30 VDD (V) 40
290 0 5 10 15 20 25 30 35 VDD (V)
RL is open-circuit.
RL is open-circuit.
Fig.25 Quiescent current as a function of supply voltage.
Fig.26 Clock frequency as a function of supply voltage.
handbook, halfpage
0
MDB562
handbook, halfpage
0
MDB563
SVRR (dB) -20
SVRR (dB) -20
-40
(1)
-40
(1)
-60
(2) (3)
-60
(2) (3)
-80
-80
-100 10
102
103
104 fi (Hz)
105
-100
0
1
2
3
4 5 Vripple(p-p)
VP = 20 V; Vripple = 2 V (p-p) with respect to ground. (1) Both supply lines in phase. (2) Both supply lines in anti-phase. (3) One supply line rippled.
VP = 20 V; Vripple = 2 V (p-p) with respect to ground. (1) fripple = 1 kHz. (2) fripple = 100 Hz. (3) fripple = 10 Hz.
Fig.27 SVRR as a function of input frequency.
Fig.28 SVRR as a function of Vripple(p-p).
2003 Jul 28
26
Philips Semiconductors
Objective specification
2 x 120 W class-D power amplifier
TDA8924
handbook, halfpage
10
MDB550
handbook, halfpage
10
MDB551
Vripple(p-p) (V) 8
Vripple(p-p) (V) 8
6
6
4
4
2
2
0 10-2
10-1
0 1 10 Po (W) 102 10 102 103 fi (Hz) 104
1 x 2 SE; VP = 24 V; fi = 10 Hz; 6300 F per supply line.
VP = 24 V; Po = 40 W into 1 x 2 SE; 6300 F per supply line.
Fig.29 Supply voltage ripple as a function of output power.
Fig.30 Supply voltage ripple as a function of input frequency.
handbook, halfpage
10
MDB559
handbook, halfpage
10
MDB558
THD + N (%) 1
THD + N (%) 1
(1)
(1)
10-1
(2) (3)
10-1
(2)
10-2
10-2
(3)
10-3 100
200
300
400
500 600 fclk (kHz)
10-3 100
200
300
400
500 600 fclk (kHz)
VP = 24 V; Po = 10 W into 2 . (1) fi = 10 kHz. (2) fi = 100 Hz. (3) fi = 1 kHz.
VP = 24 V; Po = 1 W into 2 . (1) fi = 10 kHz. (2) fi = 1 KHz. (3) fi = 100 Hz.
Fig.31 THD + N as a function of clock frequency.
Fig.32 THD +N as a function of clock frequency.
2003 Jul 28
27
Philips Semiconductors
Objective specification
2 x 120 W class-D power amplifier
TDA8924
handbook, halfpage
250 Iq 200
MDB561
handbook, halfpage
1500
MDB564
(mA)
Vres (mV) 1000
150
100 500 50
0 100
200
300
400
500 600 fclk (kHz)
0 100
200
300
400
500 600 fclk (kHz)
VP = 24 V; RL = open-circuit.
VP = 24 V; RL = 2 .
Fig.33 Quiescent current as a function of clock frequency.
Fig.34 PWM residual voltage as a function of clock frequency.
handbook, halfpage
150
MDB560
handbook, halfpage
10
MDB565
Po (W)
Vo (V) 1
10-1 100 10-2 10-3 50 10-4 10-5 0 100 10-6 200 300 400 500 600 fclk (kHz) 0 2 4 Vmode (V) 6
VP = 24 V; RL = 2 ; fi = 1 kHz; THD + N = 10 %.
Vi = 100 mV; fi = 1 kHz.
Fig.35 Output power as a function of clock frequency.
Fig.36 Output voltage as a function of mode voltage.
2003 Jul 28
28
Philips Semiconductors
Objective specification
2 x 120 W class-D power amplifier
TDA8924
handbook, halfpage
120 S/N (dB) 100
MDB566
(1)
80
(2)
60
40
20
0 10-2
10-1
1
10
102 Po (W)
103
VP = 20 V; Rs = 5.6 k; 20 kHz AES17 filter. (1) 2 x 8 SE. (2) 1 x 8 BTL.
Fig.37 Signal-to-noise ratio as a function of output power.
2003 Jul 28
29
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VDDA STABI PROT 18 RFB IN1- 9 Vin1 IN1+ 8 SGND1 11 COSC VSSA ROSC Vmode OSC 7 OSCILLATOR MODE 6 MODE MANAGER TEMPERATURE SENSOR CURRENT PROTECTION INPUT STAGE PWM MODULATOR RELEASE1 CONTROL AND ENABLE1 HANDSHAKE SWITCH1 DRIVER HIGH 16 DRIVER LOW VSSP1 OUT1 13 VDDA2 VDDA1 3 10 SGND mute STABI
Philips Semiconductors
handbook, full pagewidth
2 x 120 W class-D power amplifier
VDDP VDDA +25 V VDDP2 23 VDDP1 14 15 BOOT1
30
TDA8924
VDDP2 22 BOOT2 SGND 0V 21
SGND Vin2
SGND2 2 IN2+ 5 IN2- 4
mute
ENABLE2 CONTROL SWITCH2 AND HANDSHAKE RELEASE2
DRIVER HIGH OUT2
INPUT STAGE
PWM MODULATOR
DRIVER LOW
1 12 VSSA2 VSSA1 VSSA
RFB
24 VSSD VSSA
19 HW
17 VSSP1
20 VSSP2 -25 V VSSA
Objective specification
VSSP
MDB571
TDA8924
Fig.38 Typical application schematic of TDA8924.
Philips Semiconductors
Objective specification
2 x 120 W class-D power amplifier
17 PACKAGE OUTLINE HSOP24: plastic, heatsink small outline package; 24 leads; low stand-off height
TDA8924
SOT566-3
E D x
A X
c y E2 HE vM A
D1 D2 1 pin 1 index Q A2 E1 A4 Lp detail X 24 Z e bp 13 wM (A3) A 12
0
5 scale
10 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A A2 max. 3.5 3.5 3.2 A3 0.35 A4(1) bp c D(2) D1 D2 1.1 0.9 E(2) 11.1 10.9 E1 6.2 5.8 E2 2.9 2.5 e 1 HE 14.5 13.9 Lp 1.1 0.8 Q 1.7 1.5 v w x y Z 2.7 2.2 8 0
+0.08 0.53 0.32 16.0 13.0 -0.04 0.40 0.23 15.8 12.6
0.25 0.25 0.03 0.07
Notes 1. Limits per individual lead. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT566-3 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION
ISSUE DATE 03-02-18 03-07-23
2003 Jul 28
31
Philips Semiconductors
Objective specification
2 x 120 W class-D power amplifier
18 SOLDERING 18.1 Introduction to soldering surface mount packages
TDA8924
To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: * Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. * For packages with leads on two sides and a pitch (e): - larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. * For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time of the leads in the wave ranges from 3 to 4 seconds at 250 C or 265 C, depending on solder material applied, SnPb or Pb-free respectively. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 18.4 Manual soldering
This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended. 18.2 Reflow soldering
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Driven by legislation and environmental forces the worldwide use of lead-free solder pastes is increasing. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 270 C depending on solder paste material. The top-surface temperature of the packages should preferably be kept: * below 220 C (SnPb process) or below 245 C (Pb-free process) - for all BGA and SSOP-T packages - for packages with a thickness 2.5 mm - for packages with a thickness < 2.5 mm and a volume 350 mm3 so called thick/large packages. * below 235 C (SnPb process) or below 260 C (Pb-free process) for packages with a thickness < 2.5 mm and a volume < 350 mm3 so called small/thin packages. Moisture sensitivity precautions, as indicated on packing, must be respected at all times. 18.3 Wave soldering
Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems.
2003 Jul 28
32
Philips Semiconductors
Objective specification
2 x 120 W class-D power amplifier
18.5 Suitability of surface mount IC packages for wave and reflow soldering methods PACKAGE(1) BGA, LBGA, LFBGA, SQFP, SSOP-T(3), TFBGA, VFBGA DHVQFN, HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, HVSON, SMS PLCC(5), SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO, VSSOP Notes not suitable not suitable(4)
TDA8924
SOLDERING METHOD WAVE REFLOW(2) suitable suitable suitable suitable suitable
suitable not not recommended(5)(6) recommended(7)
1. For more detailed information on the BGA packages refer to the "(LF)BGA Application Note" (AN01026); order a copy from your Philips Semiconductors sales office. 2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". 3. These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature exceeding 217 C 10 C measured in the atmosphere of the reflow oven. The package body peak temperature must be kept as low as possible. 4. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. 5. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 6. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 7. Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
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Philips Semiconductors
Objective specification
2 x 120 W class-D power amplifier
19 DATA SHEET STATUS LEVEL I DATA SHEET STATUS(1) Objective data PRODUCT STATUS(2)(3) Development DEFINITION
TDA8924
This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).
II
Preliminary data Qualification
III
Product data
Production
Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 20 DEFINITIONS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 21 DISCLAIMERS Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
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Philips Semiconductors - a worldwide company
Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
(c) Koninklijke Philips Electronics N.V. 2003
SCA75
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
753503/01/pp35
Date of release: 2003
Jul 28
Document order number:
9397 750 11493

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